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braden_10

Atif

@braden_10
5.0(2)

ASIC RTL Design Engineer

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Sobre mí
Welcome ! With over 5 years of experience as an accomplished Electrical Computer Engineer, I specialize in RTL Design and Verification using Verilog, SystemVerilog, and VHDL. My expertise lies in creating robust and efficient digital designs while ensuring their functionality and reliability through rigorous verification methodologies. As a professional in the field, I am committed to delivering high-quality work that meets your specific requirements. Let's collaborate and bring your digital designs to life. Contact me today for exceptional RTL design and verification services.... Lee más

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b
braden_10
Atif
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Revisa mis servicios

Soporte y IT
I will design a risc v or mips processor in verilog with testbench
5.0(2)
DeUSD 50 / proyectoMás información

2 Reseñas
5.0

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  • Nivel de comunicación del Freelancer
    5
  • Recomendar a un amigo
    5
  • Servicio según lo descrito
    5
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    H

    hamzehzregat

    JO

    Jordán

    Colaboración continua
    5

    Outstanding and super quick service

    USD 50

    $

    1 día

    Tiempo

    gig

    Soporte y IT

    Útil?
    Sí
    No
    H

    hamzehzregat

    JO

    Jordán

    Colaboración continua
    5

    I had the pleasure of working with Breden for a VHDL task, and I must say that their level of expertise and service exceeded my expectations. From start to finish, Breden demonstrated exceptional professionalism and an in-depth understanding of VHDL. I recommend everyone working with him.

    USD 50-USD 100

    $

    3 días

    Tiempo

    gig

    Soporte y IT

    Útil?
    Sí
    No