RTL Design and UVM based Verification, programming languages
Pakistán
Inglés, Urdu
Parte de la información aparece en idioma inglés.
Sobre mí
Hello! I'm Sohaib Hussain, a passionate Design Verification Engineer. I specialize in creating robust verification environments using SystemVerilog and UVM, and have verified complex IPs and SoC components involving AMBA protocols (AXI4, APB).
Moreover skilled C, C++, JavaScript, MATLAB and Assembly.... Lee más