I will design and debug verilog rtl for fpga projects

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India

Hablo Tamil, Inglés, Malayalam

VLSI Design Engineer

I am an aspiring VLSI Design Engineer with a strong foundation in Digital Logic, Verilog HDL, VHDL, and FPGA prototyping. I have hands-on experience in AMBA protocols, IP integration, HLS, and hardwar...

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I will design Verilog RTL, FPGA modules, and digital logic circuits

Need help with Verilog HDL, RTL design, FPGA projects, or digital logic simulation? I can help you develop clean and synthesizable Verilog/SystemVerilog designs based on your requirements.

What I can provide:

Verilog/SystemVerilog RTL design
Combinational and sequential logic
FSM design
Counters, registers, shift registers and multiplexers
UART and basic communication modules
Digital logic modules
Testbench development
Functional simulation and waveform verification
RTL debugging and corrections
Basic FPGA-oriented designs
Source code and documentation

Tools I can work with:

Xilinx Vivado
Intel Quartus Prime
ModelSim
Verilog HDL
SystemVerilog

What you will receive:

Synthesizable RTL source code
Testbench where applicable
Simulation results/waveforms
Clear and organized code
Documentation according to the selected package

Please contact me before ordering if your project has specific requirements or multiple modules. This helps me understand the scope and select the appropriate package.

Let's build and verify your RTL design!