m
muhammad_daud10

Daud

@muhammad_daud10

Making digital design and verification easier

Pakistán
Inglés
Parte de la información aparece en idioma inglés.
Sobre mí
I am a Digital Design & Verification Engineer specializing in Verilog, SystemVerilog, UVM, and RTL design. I have hands-on experience in APB, AHB, AXI, RISC-V, UART, and SoC verification. I develop professional UVM testbenches, verification plans, constrained-random tests, RAL models, and functional coverage to ensure reliable designs. I am committed to delivering high-quality, well-documented, and on-time solutions for ASIC, FPGA, and digital design projects.... Lee más

Habilidades

m
muhammad_daud10
Daud
desconectado • 

Revisa mis servicios

Sistemas integrados e IoT
I will verify your digital IP using systemverilog and uvm
Sistemas integrados e IoT
I will design fpga based digital systems

Experiencia laboral

Digital Design Verifcation

Impare` • Tiempo completo

Apr 2025 - Dec 2025 • 8 mos

I am a Digital Design and Verification Engineer with hands-on experience in designing and verifying IPs such as UART and AXI-based models. I have worked on verification of AHB Transaction Generators and the Ultra Ethernet Transport Layer using SystemVerilog and UVM, focusing on functional correctness, protocol compliance, and coverage-driven verification.