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Shabeer A
@manahil74
Level 1
Passionate FPGA expert and ASIC Design Engineer
Pakistán
Inglés, Urdu, Hindi
Sobre mí
I hold a BS and MS in Electrical Engineering (IC Design) with experience in 5 IC tape-outs across process nodes like 14nm, 28nm, 45nm, 65nm, 110nm, 130nm, and 180nm PDKs. My expertise includes designing ,simulating and Submission of complete Analog ICs (schematic to Layout,DRC & LVS ), Digital ICs (RTL to GDSII), Mixed-Signal SoCs with IO & Seal Ring Integration, and RF ICs up to 60 GHz. I am proficient in Verilog, VHDL, and SystemVerilog and skilled in tools like Cadence Virtuoso, Mentor Calibre, Cadence Genus, Synopsys DC Compiler, VCS, Xilinx Vivado, and Intel Quartus
Habilidades
Shabeer A
desconectado •
Tiempo medio de respuesta: 5 horas
Revisa mis servicios
Placas de circuito impreso (PCB)
I will do analog and digital vlsi circuit design and layouts on cadence virtuoso
Sistemas integrados e IoT
I will do verilog vhdl coding on xilinx, vivado, quartus,modelsim for fpga
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