Uvm: encuentra los mejores servicios

Uvm: obtén los mejores servicios freelance para completar tus proyectos con éxito.

57 servicios disponibles

design and implement a complete uvm systemverilog verification environment

W

I will design and implement a complete uvm systemverilog verification environment

do rtl verification and uvm testbench development for fpga and asic

H

I will do rtl verification and uvm testbench development for fpga and asic

help you with digital logic design, verilog and uvm

I

I will help you with digital logic design, verilog and uvm

do uvm verification and verilog systemverilog rtl design

S

I will do uvm verification and verilog systemverilog rtl design

do digital logic design, verilog, systemverilog, uvm, and fpga design

d

I will do digital logic design, verilog, systemverilog, uvm, and fpga design

develop a systemverilog uvm testbench for your rtl design

V

I will develop a systemverilog uvm testbench for your rtl design

do uvm based verification in vivado, vcs, and questasim

M

Muhammad Salman

I will do uvm based verification in vivado, vcs, and questasim

provide uvm based verification environment using system verilog

M

Nivel 1

I will provide uvm based verification environment using system verilog

help verifying complex design by developing sv, uvm testbench

M

I will help verifying complex design by developing sv, uvm testbench

provide professional rtl design, systemverilog, and uvm verification services

W

I will provide professional rtl design, systemverilog, and uvm verification services

do rtl verification, uvm testbench , functional coverage for asic and fpga

A

I will do rtl verification, uvm testbench , functional coverage for asic and fpga

provide quality tasks projects of digital logic circuits and verilog uvm coding

W

I will provide quality tasks projects of digital logic circuits and verilog uvm coding

do uvm verification, riscv assembly, matlab, c, verilog, system verilog

S

I will do uvm verification, riscv assembly, matlab, c, verilog, system verilog

5.0(1)

do fpga, verilog, vhdl, systemc, uvm projects using vivado, verilator, modelsim

T

I will do fpga, verilog, vhdl, systemc, uvm projects using vivado, verilator, modelsim

do dld, verilog, system verilog, c , riscv assembly, uvm, testbench, asic, gds

S

I will do dld, verilog, system verilog, c , riscv assembly, uvm, testbench, asic, gds

5.0(2)

do uvm based verification in systemverilog with xsim vcs

A

I will do uvm based verification in systemverilog with xsim vcs

do uvm simulation using systemverilog for complex hdl module or soc design

A

I will do uvm simulation using systemverilog for complex hdl module or soc design

implement and debug fpga designs in vhdl, sv or verilog

A

I will implement and debug fpga designs in vhdl, sv or verilog

be your expert asic fpga verification engineer

k

I will be your expert asic fpga verification engineer

provide robust solutions for your functional verification needs

M

I will provide robust solutions for your functional verification needs

do system verilog coding for fpga and asic

Z

I will do system verilog coding for fpga and asic

5.0(6)

do system verilog rtl design, verification and fpga projects

W

I will do system verilog rtl design, verification and fpga projects

do rtl design and verification using verilog, systemverilog

P

I will do rtl design and verification using verilog, systemverilog

riscv project design and verification, verilog, system verilog, assembly,fsm

A

Nivel 1

I will riscv project design and verification, verilog, system verilog, assembly,fsm

record a female german voice over in high quality

L

Top

I will record a female german voice over in high quality

5.0(911)

Ofrece video consultas

do fpga work using verilog vhdl on vivado and modelsim

Y

Nivel 2

I will do fpga work using verilog vhdl on vivado and modelsim

5.0(2)

do renderings with great attention to detail of any product

R

Nivel 2

I will do renderings with great attention to detail of any product

5.0(16)

do verilog and vhdl coding for fpga

M

I will do verilog and vhdl coding for fpga

4.9(58)

do fpga, verilog, vhdl using quartus, vivado, embedded systems, xilinx ise tasks

H

I will do fpga, verilog, vhdl using quartus, vivado, embedded systems, xilinx ise tasks

4.5(17)

do fpga, verilog, vhdl using quartus, vivado, embedded systems, xilinx ise tasks

H

I will do fpga, verilog, vhdl using quartus, vivado, embedded systems, xilinx ise tasks

4.9(22)

do fpga, verilog, vhdl using quartus, vivado, embedded systems, xilinx ise tasks

U

Nivel 1

I will do fpga, verilog, vhdl using quartus, vivado, embedded systems, xilinx ise tasks

5.0(19)

do verilog vhdl fpga, digital systems, digital circuits, electronic circuits

U

Nivel 1

I will do verilog vhdl fpga, digital systems, digital circuits, electronic circuits

4.9(4)

do fpga, verilog, vhdl using quartus, vivado, embedded systems, xilinx ise tasks

Z

I will do fpga, verilog, vhdl using quartus, vivado, embedded systems, xilinx ise tasks

professionelle excel programmierung und datenauswertung

S

Sergius Ermisch

Nivel 1

I will professionelle excel programmierung und datenauswertung

4.9(78)

do digital design dld works in logisim multisim logicworks ltspice pspice

T

I will do digital design dld works in logisim multisim logicworks ltspice pspice

5.0(1)

record an IVR with with a female, clear, smooth voice

K

I will record an IVR with with a female, clear, smooth voice

do matlab simulink and matlab programming , matlab task for you

H

I will do matlab simulink and matlab programming , matlab task for you

5.0(1)

do fpga based projects in verilog and vhdl using xilinx vivado

S

I will do fpga based projects in verilog and vhdl using xilinx vivado

5.0(11)

tutor and assist in your full semester of electrical and electronics courses

M

Nivel 1

I will tutor and assist in your full semester of electrical and electronics courses

design a modern conversion focused landing page or microsite

J

I will design a modern conversion focused landing page or microsite

do verilog , vhdl coding for your fpga projects

M

Nivel 1

I will do verilog , vhdl coding for your fpga projects

do systemverilog rtl designing, testing, and fpga projects

M

I will do systemverilog rtl designing, testing, and fpga projects

5.0(7)

build an ai automation and assistant for your business

A

I will build an ai automation and assistant for your business

build a custom n8n ai agent and automation workflow for your business

A

I will build a custom n8n ai agent and automation workflow for your business

do german steuererklarung expats werbungskosten homeoffice german vat via elster

M

I will do german steuererklarung expats werbungskosten homeoffice german vat via elster

design fpga, verilog vhdl, pcie, and embedded soc systems

F

I will design fpga, verilog vhdl, pcie, and embedded soc systems

do verilog and vhdl coding for fpga

A

I will do verilog and vhdl coding for fpga

do fpga based hardware design

A

I will do fpga based hardware design

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