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Angel G
@gargangel
VLSI Engineer and Portfolio Website Developer
India
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Sobre mí
Hi, I'm Angel, an electronics (VLSI) engineer from India. I interned on the Genus synthesis team at Cadence Design Systems, published a first-author paper in Springer AICSP 2026, and have taped out chips. I build clean, fast, mobile-friendly portfolio websites for students, researchers, engineers and small startups, and deploy them for free on Netlify or GitHub Pages. I also help with RTL/Verilog, verification and chip design flow scripting. I communicate clearly, deliver on time and offer revisions until you're happy.
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Angel G
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Sitios web personalizados
I will build and deploy a professional portfolio website for you
