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Bhavya verma
@bhavyapverma
Verilog HDL and Digital Logic Designer
India
Inglés, Hindi
Sobre mí
Hello! I am a B.Tech VLSI Engineering student with knowledge of Verilog HDL, Digital Logic Design, Boolean Algebra, K-Maps, Flip-Flops, Counters, and FPGA basics. I can help with Verilog coding, digital circuit design, simulations, and academic projects. I am committed to delivering accurate work, clear communication, and on-time delivery. I look forward to working with you.
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Bhavya verma
desconectado •
Revisa mis servicios
Placas de circuito impreso (PCB)
I will write verilog hdl code for fpga and digital
