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Ankith D R
@ankith_dr_vlsi
SoC Verification, Verilog RTL, Digital Design, VLSI Tutor
India
Inglés, Kannada, Hindi
Sobre mí
Hi, I’m Ankith D R, an Electronics and Communication Engineering graduate with 8 months of experience as a SoC Verification Intern at SION Semiconductors. I have hands-on experience in Verilog/SystemVerilog, UVM, RTL design, testbench development, and waveform analysis
I can help you as a VLSI guide with:
- Verilog/SystemVerilog RTL design and debugging
- Testbench development and waveform analysis
- VLSI design and verification projects
- Academic projects and presentations
I help students and freshers in VLSI projects and internships, delivering clear solutions with quick turnaround.
Habilidades
Ankith D R
desconectado •
Tiempo medio de respuesta: 1 hora
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Programación y tecnología
I will design and debug verilog rtl modules
